This invention relates to an amplifier arrangement comprising at least
a first transistor having an emitter which is coupled to a first terminal for connection to a load which is coupled to a reference point, and having a collector which is coupled by means of a first semiconductor junction to a second terminal for a first supply voltage,
a second transistor having a collector-emitter path which is arranged in series with the collector-emitter path of the first transistor, and having a collector which is coupled to a third terminal for a second supply voltage which is higher than the first supply voltage, and
a circuit which is arranged between the base of the first transistor and the base of the second transistor and which comprises the series arrangement of at least a second semiconductor junction and a third semiconductor junction which are poled in the same direction as the base-emitter junction of the first transitor, and a fourth semiconductor junction which is poled in the same direction as the base-emitter junction of the second transistor, and
an input, which is coupled to the bases of the first transistor and the second transistor, for receiving an input signal.
The invention also relates to a push-pull amplifier equipped with such an amplifier arrangement.
Such an amplifier arrangement of the class-G type may be employed as a power amplifier for audio signals. A class-G amplifier is to be understood to mean an amplifier in which the supply voltage increases in a number of steps depending on the input signal. This results in an amplifier having a high efficiency.
Such an amplifier arrangement is disclosed in U.S. Pat. No. 3,961,280. In this known arrangement the input signal is applied to the bases of the first transistor and the second transistor via a third transistor arranged as an emitter follower. For low input voltages the second transistor is cut off so that the first transistor is connected to the first supply voltage. If the input voltage becomes higher than the first supply voltage, the second transistor is turned on so that the first supply voltage is disconnected and the first transistor is coupled to the second supply voltage.
When the second transistor does not conduct, the voltage across the base-emitter junction of this transistor is at the most equal to substantially the full first supply voltage. In order to preclude breakdown of the base-emitter junction as a result of this voltage, a diode is arranged in the base line of the second transistor. In order to prevent the first transistor from being bottomed and thereby producing distortion when the second transistor is not yet fully conductive, two series-connected diodes are arranged in the base line of the first transistor.
However, a drawback of this arrangement is that it has a limited output voltage swing and, consequently, a limited efficiency. In the known arrangement the input signal is applied to the bases of the first transistor and the second transistor via a third transistor arranged as an emitter follower, which third transistor is of the same conductivity type as the first transistor and the second transistor. For the maximum output voltage the voltage on the base of the third transistor is substantially equal to the second supply voltage. The voltage on the output is then equal to the second supply voltage minus the sum of the base-emitter voltages of the first transistor and the third transistor and the diode voltages across the two diodes arranged in the base line of the first transistor.